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Programming Languages

Tcl

VSD - TCL programming - From novice to expert - Part 1

VSD - TCL programming - From novice to expert - Part 1

Loại khoá học: Programming Languages

The Expert In Anything Was Once A Beginner

50.000 VND

26 VND

Đầy Đủ Bài Giảng

Học Online Tiện Lợi

Kích Hoạt Nhanh 2-5 Phút

Thanh toán tự động

Được phép tải xuống

Mô tả

And I really believe in that...

I was a novice in TCL programming 10 years back. One thing that led from novice to an expert is "Practice"

Be it learning scripting language or an EDA tool, nothing beats 'concepts'. I have been proving this in my courses, how learning a tool is the last 5% task of entire learning flow.

My students, who have been working with on several projects and also learning through my courses, have not only learned semiconductors, but lived the journey. And I promise, the same will happen with my this course on TCL scripting as well.

I have been using the same approach in last 10 years for solving problems, be it a TCL script issue or an issue with STA timing violation or an issue with DRC or an issue with floor planning or an issue with routing congestion, you name it..

You will witness the same in all my courses and in this one as well. Let's unveil the concepts of data flow and manipulation using TCL scripts

Bạn sẽ học được gì

Build TCL scripts on their own from scratch

Build their own UI (user-interface)

Build their own procs and commands

Yêu cầu

You should be able to understand basic UNIX commands like vim, ls -ltr, etc.
You should have a virtual machine with UNIX and TCL running, if using a Windows laptop
You should be able to install any linux package

Nội dung khoá học

7 sections

Introduction

2 lectures

Introduction to TCL task

05:47

Introduction to sub-task

09:06

Sub-Task One : VSDSYNTH Toolbox usage scenarios

2 lectures

Scenario 1 - User doesn't provides input csv file

09:52

Scenario 2 & 3 - User providing incorrect csv OR typing "-help"

09:41

Sub-Task Two - From CSV to format[1] and SDC - Variable Creation

7 lectures

Various tasks involved in format conversion

08:17

openMSP430_design_details.csv

00:02

Auto-Create variables using matrix and arrays

10:12

Initialize variables for auto-creation variables task

11:39

Auto creation of first variable - DesignName

10:50

Auto creation of variables complete

09:51

Variable Creation DEMO using TCL

08:56

Sub-Task Two - From CSV to format[1] and SDC - Processing constraints,csv

4 lectures

Checking existence of files and folders mentioned in design_details.csv

10:23

Convert constraints.csv file to a matrix object

09:44

Compute row number using complex matrix proccessing

10:06

DEMO for computing row numbers

08:16

Sub-Task Two - From CSV to format[1] and SDC - Processing clock constraints

5 lectures

Algorithm to identify column number for clock latency constraints

08:18

Start writing clock latency constraints in SDC file

09:42

Complete clock latency constraints and clock slew constraints in SDC file

09:08

Code to create clock constraints with clock period and duty cycle

09:47

DEMO for creating complete clock constraints

06:51

Sub-Task Two - From CSV to format[1] and SDC - Processing input constraints

8 lectures

Introduction to task of differentiating between bits and bus

07:58

Algorithm to categorize input ports as bits and bussed

09:10

File access and pattern creation steps

08:29

Regular expression and regular substitute to get fixed space strings

08:39

Demo for grepping input ports from all verilogs and reformatting for fixed space

11:05

Read, split, uniquify, sort and join input ports to remove duplication

09:39

Evaluate length of string and Demo of bits/bussed differentiation script

10:02

Demo for input constraints generation and bits/bussed differentiation

07:50

Full script for download and Conclusion

1 lectures

Constraints generation logic for output port and Conclusion!!

05:19

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